Standard FlipChip – Repassivation (PBO or BCB)

Our Standard FlipChip-Repassivation process flows are similar to the Standard FlipChip-Bump on I/O process, but support bumping applications that do not meet all of the I/O final metal pad and passivation opening requirements of Standard FlipChip-Bump on I/O. In this process, a stress relieving layer of either Benzocyclobutene (BCB) or Spheron™ (an FCI proprietary high performance dielectric repassivation layer) is deposited on the die before bumping. The repassivation layer corrects for the issue of the I/O passivation opening being too small or too large for a standard flip chip bump. It also corrects for the issue of the I/O final metal pad being too small for a standard flip chip bump. The repassivation dielectric layer also planarizes the device surface and gives the bump structure additional strength and robustness.
As with Standard FlipChip-Bump on I/O, Standard FlipChip-Repassivation is designed for small bumps (less than 130μm) placed directly on the die I/O. Pitch capabilities in this process are typically 150μm or greater for full array I/O or peripheral I/O design. The number of bumps per die typically can range from 4 to 6000. The Standard FlipChip-Repassivation process uses premixed solder paste for the solder bumps. This provides for outstanding control of the alloy composition across the entire wafer. Since the process is not limited to the bi-metal constraints of an electroplated solder process, multi-metal alloy (including Sn/Ag/Cu) options are readily available. As with all die processed with small bumps, die bumped with the Standard FlipChip-Repassivation process will require the use of underfill during packaging.
If your device contains bumps that will not be placed directly on the I/O, take a look at section 3.3 in the Design Guide, which describes the Standard FlipChip-Redistribution flow. If you are looking for bump heights greater than 160μm, take a look at section 3.5 and 3.6 in the Design Guide, which covers the Spheron and UltraCSP WLCSP flows – the industry’s standards in Wafer Level Chip Scale Packaging solutions.