On some die, the I/O are not located where you need to have the bumps. This is especially true when you take a die originally designed for wire bond packaging applications and need to convert it to be flip chip compatible. The Standard FlipChip-Redistribution Line (or RDL) process adds “redistribution metallization” (often called “runners’ or “traces”) that let you re-route the signal path from the die peripheral I/O to an area array of new bump locations, often with significant loosening of effective bump pitches.
Although a single RDL layer is most commonly used today, FCI has successfully supported more complex Standard FlipChip-RDL applications involving up to 3 metal layers. Although FCI’s metallization schemes have historically involved subtractive, sputtered metal RDL and UBM options, more recently, FCI has also added semi-additive electroplated Cu based options to its product lineup. Redistribution Standard FlipChip bumping flows are intended to produce bumps of less than 130μm in height, although the typical bump height is -100um.
Typical pitch capabilities in this process are 70μm or greater. RDL runners using subtractive sputtered metallization schemes are allowed a minimum of 20um wide lines and 22um wide spaces. For finer pitch, higher aspect ratio RDL requirements, including On Chip Inductor applications, FlipChip also has available semi-additive Cu electroplated metallization schemes which allow a minimum of 8um wide lines and 10um wide spaces if needed. Since the Standard FlipChip process is not limited to the bi-metal constraints of an electroplated solder process, multi-metal alloys (including Sn/Ag/Cu) are readily available. As with all die processed with small bumps, these die will require the use of underfill during packaging.